The present application claims priority to Japanese Application No. P2000-375994 filed Dec. 11, 2000, which application is incorporated herein by reference to the extent permitted by law.
The present invention relates to a semiconductor device including MOS transistors formed in thin film semiconductor regions and to a method of fabricating the semiconductor device.
Semiconductor devices such as LSIs (Large Scale Integrated Circuits) are each often formed on an Si chip, and are used for computers, communication terminals, and the like. Such a semiconductor device, however, is difficult to be formed on a large-sized Si chip, and if the semiconductor device can be formed on a large-sized Si chip, then the production cost thereof becomes high. A large-sized Si chip also has a disadvantage that the Si chip is not rigid and is thereby easily cracked. The recent development of semiconductor devices places emphasis on making device structures finer and lowering a voltage for operating devices. An operating speed of devices is also limited by an interconnection resistance, a junction capacitance, a channel depletion capacitance, and a heavily doped channel, and therefore, the operating speed of devices becomes closer to a critical value. To cope with such a problem, it would be expected to develop an LSI, which is aimed at improvement of interconnections and configured to include a transistor portion of an SOI (Silicon On Insulator) type having a thin film transistor (TFT) structure.
On the other hand, LCDs (Liquid Crystal Displays) of a type having polysilicon thin film transistors allowed to be integrated with scanning circuits have been commercially available. With respect to such an LCD, to enhance the function and enlarge the area, it has been required to produce a thin film transistor with higher mobility in both a scanning circuit and a peripheral circuit and with less variations in characteristics even with a fine device structure. The thin film transistor used for LCDs has been further required to have a circuit configuration coping with a reduced voltage and to have a system-on-panel structure in which a peripheral circuit is formed on the same substrate.
By the way, studies have been actively made to develop a gate material capable of operating a transistor at a low voltage and accurately controlling a threshold voltage. In particular, along with a tendency to form a semiconductor device on a substrate made from an inexpensive synthetic resin, a low temperature process including a step of forming a gate electrode has come to be required. In the recent technique of fabricating Si based LSIs, a polycrystalline silicon material is generally used as a gate electrode material.
In the case of forming a gate electrode of an MOS transistor by using polycrystalline silicon, however, there arises a problem. Since a concentration of an impurity doped in a channel region must be reduced, particularly, for realizing low voltage operation of the transistor, an nMOS transistor is depleted, thereby failing to obtain ideal operational characteristics of the transistor. The use of polycrystalline silicon causes another problem that polycrystalline silicon is not appropriate for a low temperature process using a low heat-resisting substrate such as a plastic material because of its high melting point.
As one countermeasure for solving such a technical problem, it has been known to use silicon-germanium (SiGe) as a gate electrode material. The use of silicon-germanium is advantageous in lowering an operational voltage as described, for example, in xe2x80x9cApplications of Polycrystalline Silicon-Germanium Thin Films in Metal-Oxide-Semiconductor Technologiesxe2x80x9d, Tsu-Jae King, Stanford Electronics Laboratories Technical Report No. ICL 94-031, 52-57 pp.
Even in the case of using, as a gate electrode material, silicon-germanium suitable for a low temperature process and effective to enhance operational characteristics of a transistor, however, if only the gate electrode material is changed to silicon-germanium with a related art device structure left as it is, the effect of using silicon-germanium is not sufficient in terms of a high speed operation and a high integration degree. Therefore, a semiconductor device using silicon-germanium as a gate electrode material would be expected to have a structure more suitable for a high speed operation and a high integration degree.
An object of the present invention is to provide a semiconductor device, which can be finely processed even by a low temperature process, and which can realize a low voltage operation and a high speed operation, and further a high integration degree, and to provide a method of fabricating the semiconductor device.
To achieve the above object, according to an aspect of the present invention, there is provided a semiconductor device including: a gate electrode made from silicon-germanium or germanium; a first semiconductor region formed under the gate electrode with a first gate insulating film between the first semiconductor region and the gate electrode; and a second semiconductor region formed over the gate electrode with a second gate insulating film between the second semiconductor region and the gate electrode, wherein a first conductivity type MOS transistor includes the first semiconductor region, the first gate insulating film, and the gate electrode, and a second conductivity type MOS transistor includes the second semiconductor region, the second gate insulating film, and the gate electrode.
With this configuration, since a first conductive type MOS transistor and a second conductive type MOS transistor are disposed on the upper and lower sides of a common gate electrode made from silicon-germanium or germanium, it is possible to improve the integration degree of the device and realize a high operational speed of the device.
According to another aspect of the present invention, there is provided a method of fabricating a semiconductor device, including the steps of: forming an insulating layer on a substrate; forming a first semiconductor region on the insulating layer; forming a first gate insulating film on the first semiconductor region; forming a gate electrode layer made from silicon-germanium or germanium on the first gate insulating film in such a manner as to be stacked on the first semiconductor region; activating the gate electrode layer; forming a second gate insulating film on the activated gate electrode layer; and forming a second semiconductor region on the second gate insulating film.
With this configuration, since a gate electrode layer made from silicon-germanium or germanium is formed on a gate insulating film in such a manner as to be stacked on a first semiconductor region and a second semiconductor region is formed on the gate electrode layer via a gate insulating film, it is possible to dispose MOS transistors on the upper and lower sides of the common gate electrode, and hence to increase the integration degree of the device.